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RF2486
8
Typical Applications
* CDMA/TDMA/DCS1900 PCS Systems * PHS 1500/WLAN 2400 Systems * General Purpose Downconverter * Micro-Cell PCS Base Stations * Portable Battery-Powered Equipment
PCS LOW NOISE AMPLIFIER/MIXER
Product Description
The RF2486 is a monolithic integrated receiver front-end for PCS, PHS, and WLAN applications. The IC contains all of the required components to implement the RF functions of the receiver front-end except for the passive filtering and LO generation. It contains an LNA (low-noise amplifiers), a double-balanced Gilbert cell mixer, a balanced IF output, an LO isolation buffer amplifier, and an LO output buffer amplifier for providing the buffered LO signal as an output. The IC is designed to operate from a single 3.6V power supply.
0.157 0.150
0.0098 0.0040
1
0.344 0.337
0.012 0.008
0.025 0.0688 0.0532
0.2440 0.2284 8MAX 0MIN
8
0.0098 0.0075
0.050 0.016
Optimum Technology Matching(R) Applied
Package Style: SSOP-24
uSi Bi-CMOS
NC 1 VCC1 2 VCC2 3 GND1 4 LNA IN 5 GND2 6 GND3 7 NC 8 GND4 9 VCC3 10 LO BUFF EN 11 LO IN 12
Si BJT
GaAs HBT SiGe HBT
GaAs MESFET Si CMOS
24 NC 23 GND9 22 VCC4 21 GND8 20 LNA OUT 19 GND7 18 MIX RF IN 17 GND6 16 IF15 IF+ 14 GND5 13 LO BUFF OUT
Features
* Complete Receiver Front-End * High Dynamic Range * Single 3.6V Power Supply * External LNA IP3 Adjustment * 1500MHz to 2500MHz Operation
Ordering Information
RF2486 PCS Low Noise Amplifier/Mixer RF2486 PCBA-L Fully Assembled Evaluation Board 1.96GHz RF2486 PCBA-H Fully Assembled Evaluation Board 2.4GHz RF Micro Devices, Inc. 7628 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com
Functional Block Diagram
Rev A7 010717
8-105
FRONT-ENDS
RF2486
Absolute Maximum Ratings Parameter
Supply Voltage Input LO and RF Levels Ambient Operating Temperature Storage Temperature
Rating
-0.5 to 5.5 +6 -40 to +85 -40 to +150
Unit
VDC dBm C C
Caution! ESD sensitive device.
RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s).
Parameter
Overall
RF Frequency Range LO Frequency Range IF Frequency Range
Specification Min. Typ. Max.
1500 1200 DC 24 -17 27 -16 3.6 2500 2500 500 28
Unit
Condition
T = 25C, VCC =3.6V, RF=1959MHz, LO=1749MHz @ +1 dBm
MHz MHz MHz 1k balanced load, 2.5dB Image Filter Loss. dB dBm dB
Cascaded Performance
Cascade Conversion Gain Cascade Input IP3 Cascade Noise Figure
First Section (LNA)
Single Sideband The LNA section may be left unused. Power is not connected to pin 1. The performance is then as specified for the Second Section (Mixer). Input is internally matched for optimum noise figure from a 50 source. IP3 may be increased 10dB by connecting pin 22 to VCC through the matching inductor. The LNA's current then increases by 10mA. Other in-between IP3 versus ICC trade-offs may be made. See pin description for pin 20. R2=Open R2=Short
8
FRONT-ENDS
Noise Figure Input VSWR Input IP3
1.8 1.5:1 +4
dB 2.0:1 dBm
Gain Reverse Isolation Output VSWR
+8.5 13.5 23 <1.5:1 10 1.5:1 -5 16 1 -3 -7 +3 +1 -14
dBm dB dB
Second Section (Mixer)
Noise Figure Input VSWR Input IP3 Conversion Gain Output Impedance dB dBm dB k dBm dBm dBm dB dB
With 1k balanced load. Single Sideband
Balanced
LO Input
LO Input Range LO Output Level LO to RF (Mix In) Rejection LO to IF1, IF2 Rejection LO Input VSWR -3 -22 30 20 1.5:1 3.6 7 52 48 Buffer On, +1dBm input Buffer Off, +1dBm input
Single ended 5.0 V mA mA mA
Power Supply
Voltage Current Consumption 2.7 LNA only LNA + Mixer, LO Buffer On LNA + Mixer, LO Buffer Off
8-106
Rev A7 010717
RF2486
Pin 1 2 Function NC VCC1 Description
No connection. This pin may be grounded (recommended) or left open. Supply voltage for the mixer and RF buffer amplifier. External RF bypassing is required. The trace length between the pin and the bypass capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. Supply voltage for the LNA. External RF bypassing is required. The trace length between the pin and the bypass capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. Ground connection for the LNA. For best performance, keep traces physically short and connect immediately to ground plane. RF input pin for the LNA. This pin is internally matched for minimum noise figure (NOT for minimum VSWR), given a 50 source impedance. This pin is not internally DC-blocked. Same as pin 4. Ground connection for the RF buffer amplifier. For best performance, keep traces physically short and connect immediately to ground plane. No connection. This pin may be grounded (recommended) or left open. Same as pin 7. Supply voltage for both LO buffer amplifiers. External RF bypassing is required. The trace length between the pin and the bypass capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. Enable pin for the LO output buffer amplifier. This is a digitally controlled input. A logic "high" (3.1V) turns the buffer amplifier on, and the current consumption increases by 3mA (with -2dBm LO input). A logic "low" (0.5V) turns the buffer amplifier off. Mixer LO input pin. This pin is internally DC-blocked and matched to 50. Optional buffered LO output. This pin is internally DC-blocked and matched to 50. The buffer amplifier is switched on or off by the voltage level at pin 11. Ground connection for both LO buffer amplifiers. For best performance, keep traces physically short and connect immediately to ground plane. Open-collector IF output pin. This is a balanced output. The output impedance is set by an internal 1000 resistor to pin 16. Thus the differential IF output impedance is 1000. The resistor sets the operating impedance, but an external choke or matching inductor to VCC must be supplied in order to bias this output. This inductor is typically incorporated in the matching network between the output and IF filter. Because this pin is biased to VCC, a DC blocking capacitor must be used if the IF filter input has a DC path to ground. Same as pin 15, except complementary output. Ground connection for the mixer. For best performance, keep traces physically short and connect immediately to ground plane. Mixer RF input pin. This pin is internally DC-blocked and matched to 50. Same as pin 17.
150 VCC1 BIAS VCC4
Interface Schematic
3
VCC2
4 5
GND1 LNA IN
LNA IN
6 7 8 9 10
GND2 GND3 NC GND4 VCC3
11
12 13 14 15
LO IN LO BUFF OUT GND5 IF+
IF1 k
IF+
16 17 18 19
IFGND6 MIX RF IN GND7
See pin 15.
Rev A7 010717
8-107
FRONT-ENDS
LO BUFF EN
8
7.5 k LO BUFF EN
RF2486
Pin 20 Function LNA OUT Description
LNA output pin. This is an open-collector output. This pin is typically connected to pin 22 through a bias/matching inductor. This inductor, in conjunction with a series blocking/matching capacitor, forms a matching network to the 50 image filter and provides bias (see application schematic). The LNA's IP3 may be increased 10dB by connecting pin 20 to VCC through the inductor. The LNA's current then increases by 10mA. Other in-between IP3 versus ICC trade-offs may be made by connecting resistance values between VCC and the matching inductor. The two reference points for consideration are with 150 used, which is what connection to pin 22 achieves, the input IP3 is +5.5dBm and the LNA ICC is 5mA. Using no resistance, the input IP3 is +15.5 dBm and the LNA ICC is 15 mA. Desired operating points in between these values may be roughly interpolated. Same as pin 17. Output supply voltage for the LNA output (pin 20). This pin is typically connected to pin 20 through a bias/matching inductor (see application schematic). External RF bypassing is required. The trace length between the pin and the bypass capacitor should be minimized. The ground side of the bypass capacitor should connect immediately to ground plane. Same as pin 17. No connection. This pin may be grounded (recommended) or left open. See pin 2.
Interface Schematic
LNA OUT
21 22
GND8 VCC4
23 24
GND9 NC
8
FRONT-ENDS
Application Schematic 1.96GHz, 210MHz IF
See evaluation board
R2 VCC 1 2 1 nF 22 pF 3 4 22 pF LNA2 IN 5 6 7 VCC 8 9 10 1 k BUF ENBL 1 nF 22 pF 11 12 14 13 20 19 18 17 16 15 470 nH 470 nH 100 pF VCC 100 pF
1 2
24 23 22 21 1.8 nH 2 pF 22 pF
VCC
LNA OUT 22 pF SAW Filter
22 pF MIX IN IF SAW Filter 470 nH
1 nF
22 pF
1 nF
22 pF
4.7 F
LO IN 2.7 nH LO OUT
8-108
Rev A7 010717
RF2486
Evaluation Board Schematic 1.96GHz, 210MHz IF
(Download Bill of Materials from www.rfmd.com.)
VCC
R 2* SAT VCC 1 2 C 10 1 nF C5 2 2 pF 3 4 50 strip 5 6 7 VCC C 12 22 pF C6 1 nF 8 9 10 11 C14 1 nF J2 LO IN 50 strip C7 2 2 pF 12 20 19 50 s trip 18 17 16 15 14 13 24 23 22 21 L1 2.7 n H
C3 2 2 pF **S e e N otes ** C4 1 .5 pF C1* 22 pF F L1* 50 strip C 1a 22 pF 50 strip J6 LNA OUT
J1 L N A 2 IN
50 strip
C 18 22 pF
**S ee N ote s**
C2* 22 pF C 2a 22 p F
50 s trip
**S ee N o te s** J5 M IX E R IN C8 5 pF
T1 C 16 10 0 pF C 17 10 0 pF L3 47 0 nH 50 s trip L2 47 0 nH L5 22 0 nH TOKO C 11 1.0 pF L4 4 7 nH
J4 IF O U T
R1 1 k BUFF EN
2 486400 -
J3 LO OUT VCC P1 1
VCC C 13 1 nF G nd *C om p on ents n ot no rm a lly p op ula ted. NO TE S: C 1 1 selecte d to fine tu ne L 4 for IF ou tput m a tch a t 210 M H z. R 2 is no rm ally n ot po pu late d. F or ap plica tion s req uiring a dd itio nal LN A IP 3, see the d ata s hee t fo r rec om m end ed resistanc e va lue s. C 1 a an d C 2a a re no rm ally n ot po pulate d. If C 1a an d C 2 a a re po pulated , the L N A a nd m ixe r can b e tes te d in de pen de ntly . In th is c ase , C 1 a nd C 2 s hou ld b e re m ov ed. To use the p art w ith o nbo ard filter, d o no t p op ula te C 1a, a nd C 2a . U se C 1 and C 2 ins tead . Th is w ill allow ca sca ded ope ratio n o nly . VCC C9 2 2 pF + C 15 4.7 u F B U F F E R E N A B LE
8
FRONT-ENDS
2 3
Rev A7 010717
8-109
RF2486
Evaluation Board Schematic 2.4GHz, 280MHz IF
(Download Bill of Materials from www.rfmd.com.)
VCC
R2* SAT VCC 1 2 C10 1 nF C5 22 pF 3 4 J1 LNA2 IN 50 strip 5 6 7 VCC C12 22 pF C6 1 nF 8 9 10 11 C14 1 nF J2 LO IN 50 strip C7 22 pF 12 20 19 50 strip 18 17 16 15 14 13 24 23 22 21 L1 1.8 nH
C3 22 pF
C4 2.0 pF C1* 22 pF
50 strip
C1a 22 pF
**See Notes** 50 strip J6 LNA OUT
FL1*
C2* 22 pF C2a 22 pF
50 strip
**See Notes** J5 MIXER IN C8 6 pF C11 1.0 pF L4 22 nH
C16 100 pF L5 180 nH C17 100 pF L3 470 nH L2 470 nH
T1 TOKO
J4 IF OUT
R1 1 k BUFF EN
8
FRONT-ENDS
2486401-
50 strip VCC C13 1 nF Gnd *Components not normally populated. NOTES: C11 selected to Fine Tune L4 for IF Output Match at 280 MHz. R2 is normally not populated. For applications requiring additional LNA IP3, see the datasheet for recommended resistance values. C1a and C2a are normally not populated. If C1a and C2a are populated, the LNA and mixer can be tested independently. In this case, C1 and C2 should be removed. To use the part with onboard filter, do not populate C1a, and C2a. Use C1 and C2 instead. This will allow cascaded operation only. P1-1 C9 22 pF C15 + 4.7 uF P1 1 2 P1-3 3 CON3 BUFFER ENABLE GND VCC VCC
J3 LO OUT
8-110
Rev A7 010717
RF2486
Evaluation Board Layout 1.96GHz Board Size 3.0" x 3.0"
Board Thickness 0.075.6", Board Material FR-4, Multi-Layer
(8 mils between Layers 1 and 2, 31 mils between Layers 2 and 3, 1 ounce copper all layers)
8
FRONT-ENDS
Rev A7 010717
8-111
RF2486
Evaluation Board Layout 2.4GHz Board Size 3.0" x 3.0"
8
FRONT-ENDS
8-112
Rev A7 010717

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